Optical lithography or photolithography has been widely used in the semiconductor industry in connection with the formation of a wide range of structures present in integrated circuit (IC) devices. The photolithography process generally begins with the formation of a photoresist layer on or over the top surface of a semiconductor substrate or wafer (or some intermediate layer). A reticle or mask having fully light non-transmissive opaque regions, which are often formed of chrome, and fully light transmissive clear regions, which are often formed of quartz, is then positioned over the photoresist coated wafer.
The mask is placed between a radiation or light source which produces light of a pre-selected wavelength (e.g., ultraviolet light) and geometry, and an optical lens system, which may form part of a stepper apparatus. When the light from the light source is directed onto the mask, the light is focused to generate a reduced mask image on the wafer, typically using the optical lens system, which contains one or several lenses, filters, and/or mirrors. The light passes through the clear regions of the mask to expose the underlying photoresist layer and is blocked by the opaque regions of the mask, leaving that underlying portion of the photoresist layer unexposed. The exposed photoresist layer is then developed, typically through chemical removal of the exposed or unexposed regions of the photoresist layer. The end result is a semiconductor wafer coated with a photoresist layer exhibiting a desired pattern, which defines geometries, features, lines and shapes of that layer. This pattern can then be used for etching underlying regions of the wafer.
There is a pervasive trend in the art of IC device design and fabrication to increase the density with which various structures are arranged. For example, a flash memory device can include a core region containing one or more arrays of densely-packed double-bit memory cells. The manufacture of such a device can include patterning a contact layer to include regular arrays of densely-packed contact holes (e.g., source/drain contact holes) on a minimum pitch along a first direction as well as a plurality of semi-isolated contact holes (e.g., Vss contact holes). Once formed, these contact holes can be filled with a conductive material, such as a metal, a metal-containing compound or a semiconductor, to form conductive vias for electrically connecting structures disposed above and below the contact layer.
One conventional method of forming contact holes includes performing a double exposure technique using two different illumination sources to expose two different masks (or one mask rotated into two different orientations) for patterning one contact layer. With such a technique, each mask/illumination pair can be optimized to deliver maximum resolution for a given class of structures, while minimizing the impact on the structures defined or otherwise patterned by the other exposure. However, as with any double exposure technique, the effects of misalignment must be taken into account, which can be difficult, time-consuming, and expensive. Otherwise, printing defects may occur.
While various mask types and aggressive illumination strategies have been employed for the imaging of sub-resolution features, including contact holes, each illumination type has certain tradeoffs (e.g., improved contrast at the expense of depth of focus). In addition, each mask type can exhibit varying performance dependent on the pattern to be imaged.
Accordingly, a need exists for an improved system and method for fabricating contact holes of varying pitch and density.